sprasad mahapatro

With Over 11+ years of experience in the semiconductor industry, I have worked on various aspects of physical design including Synthesis, Place & Route, STA, Timing closure, Physical Verification, IREM, LEC etc. I have sound knowledge on industry standard tools such as Synopsys FC/ICC2, Primetime, Calibre, Redhawk etc.

As a physical design engineer, I have experienced working with partitions/blocks in various applications such as SOC, GPU, Networking, server domain chips in leading process tech node of 6nm.

In addition to my technical skills, I am an excellent team player with strong communication and interpersonal skills, goal oriented, individual as well as team contributor. I have experienced working with cross functional teams including design, verification, IP and CAD teams.

Senior SOC Design Engineer, Intel Microelectronics, Penang, Malaysia

Duration: 8th Sept 2021 – 31st March 2023

Staff Engineer VLSI Design Eximius India Pvt Ltd, Hyderabad

Duration: 22nd July 2019 – 18Th Aug 2021

Advance Engineer, Altran, Penang, Malaysia

Duration: 25th Jan 2019 – 16th July 2019

Staff Engineer, Eximius India & Eximius Design Sdn Bhd, Johor, Malaysia

Duration: 12Th May 2017 – 31st Dec 2018

Senior Engineer VLSI Design, Whizchip Design Technologies, Bangalore

Duration: 28th Dec 2015 – 10th May 2017

Member of Technical Staff, Graphene Semiconductor Services, Bangalore.

Duration: 8th June 2015 – 23rd Dec 2015

ASIC Physical Design Engineer, ESCON Department, Cyient Ltd, Hyderabad.

Duration: 1st JULY 2011 – 5th June 2015

Bachelors in Technology  (Graduate) in Electronics & Instrumentation Engineering from National Institute of Science & Technology, Berhampur, Odisha with in 2011.