WING JIAN KHOO
Engineering / Architecture
About WING JIAN KHOO:
I am a graduate trainee currently working in a semiconductor company as a front-end engineer.
Experience
Graduate Trainee, Intel Microelectronics (M) Sdn Bhd
- Mastered SystemVerilog for RTL design and debugging
- Contributed to the integration of Phase-Locked Loop (PLL) IP , developing the Test Access Port (TAP) , Virtual Instrument Software Architecture (VISA), and Fuses
- Collaborated closely with experienced engineers to ensure the integrated PLL IP effectively supports clock distribution on demand
Education
Bachelor of Electronic Engineering With Honours
- Universiti Tun Hussein Onn Malaysia (UTHM) Major in Mechatronic Engineering.
- Graduated with 3.96 CGPA .
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