SOC Design Manager - Bandar Baru Bangi, Malaysia - NVIDIA

    NVIDIA
    NVIDIA Bandar Baru Bangi, Malaysia

    2 weeks ago

    Default job background
    Full time
    Description

    Are you looking for an exciting growth opportunity? If yes, come and join us. The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment.

    The NVIDIA System-On-Chip (SOC) group is looking for a top ASIC manager with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design and verification. You should have real passion for methodologies and automation solutions that enable SOC creation in the most optimized way.

    In this position, you will get the opportunity to build complex GPU and Tegra chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.

    In addition, you will be responsible for building and directing a team of local team members within Taiwan to cooperate and enhance our workflows with other sites.

    What you'll be doing:

  • Building and managing a team to extend our responsibilities within the Taiwan region.
  • Define and develop system-level methodologies and tools to build SOCs in an efficient and scalable manner
  • Identify inefficiencies and improvement opportunities in the front-end chip implementation process and propose ideas to tackle them
  • Own front-end design quality checks and reviews to present the physical design team with high-quality RTL
  • What we need to see:

  • BS or MS in Computer or Electrical Engineering or equivalent experience
  • 5+ years of proven experience in chip design, specializing in SOC integration and design automation.
  • 4+ years of proven experience in chip management with at least 8 direct reports.
  • Excellent analytical and problem-solving skills.
  • Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design/integration flow, and design automation.
  • Strong coding skills in Perl, Python, or other industry-standard scripting languages.
  • Great communication and teamwork skills to interact within the team and across functional teams to build consensus.
  • Experience in synthesis, padring, and physical design is a plus.