Sr. Digital Verification Engineer - Penang, Malaysia

We are searching for a Verification Engineer to work with architects, hardware engineers and firmware engineers. The role involves building test plans, debugging test failures and reviewing functional metrics. · Collaborate with architects, hardware engineers and firmware enginee ...

+ 4+ years of experience in design verification Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field · Expertise in PCIe, AUH, and AXI protocols · ...

About the role: · As a core member of the verification team, you will be responsible for building robust verification environments and performing advanced verification strategies to ensure the functionality, reliability, and performance of IP, block-level modules, and SoC product ...

Job Responsibilities: · Be part of a team verifying complex IPs and driving them to closure against challenging milestones. · Build verification environments and UVM/OVM testbenches based on chip requirements. · Work across RTL, power-aware, and gate-level verification. · Require ...

+Design verification engineer for DRAM protocol compliance and functionality through rigorous testing and simulation. · +Verify designs for DRAM (e.g., LPDDR4/5, DDR4/5, HBM) protocol compliance and functionality through rigorous testing and simulation. · Develop and execute desi ...

Key Responsibilities · Develop and execute verification plans for USB IP/Controller designs. · Build and maintain SystemVerilog/UVM-based verification environments. · Develop testbenches, sequences, drivers, monitors, and scoreboards. · Create directed and constrained random test ...

Lattice Overview · There is energy here…energy you can feel crackling at any of our international locations. It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and m ...

Job Responsibilities · : · According to the design requirements, architecture, and specifications, develop verification plans and schedules · According to the verification plan and schedule, set up an IP or SoC verification environment, develop and debug verification cases, check ...

This position involves supporting physical verification and parasitic extraction in a custom design environment. · Set up and verify physical verification and parasitic extraction tools/flows · Maintain and improve physical verification and parasitic extraction processes across m ...

Job Details: · Job Description:  · The world is transforming - and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We're inviting dynamic and imaginative technocrats to take part in creating it. · The Power Man ...

We are growing and looking for self-motivated, multi-tasker, and demonstrated team-player. This position will be responsible for RTL verification. · ...

The role works on digital design verification within a team in Singapore. · ...

Central Engineering Group (CEG) is an organization which oversee all test chip design, all foundational and hard IP, all EDA and design platform functions for Intel Products as well as all external IP and EDA commercial licensing This job opportunity in CEG will be part of the Fo ...

Job Details: · Job Description:  · Performs functional verification of CPU logic to ensure design will meet specification requirements. · Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to CPU microarchitecture specific ...

We are seeking a highly motivated Design Automation Methodology Engineer to define, develop, and maintain scalable automation... · ...

As an IC CAD Engineer you will be responsible for supporting physical verification and parasitic extraction in a custom design environment. · ...

Lattice Overview · There is energy here…energy you can feel crackling at any of our international locations. It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and m ...

We are looking for energetic SoC Frontend Integration Engineer at various level to drive the frontend integration of complex System-on-Chip (SoC) FPGA designs. · Construct SoC frontend RTL integration assembling internal and third-party IPs into top-level SoC designs. · Drive SoC ...

This role will perform physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. · ...

Candidate will perform physical implementation works for advanced Soc/ASIC designs from SYN to GDS. · The role involves synthesis, floorplanning, clock tree, static timing analysis (STA), signal integrity, EM/IR analysis, ECO implementation, formality verification and physical de ...