- Validate the logic functionality and new architectural features of next generation RISC-V CPU IP designs
- Knowing intimately the architecture designs of new features to develop test plans
- Develop new test content and/or test tools based on test plans
- Ensure effectiveness and coverage of tests developed in the qualification of new designs
- Perform simulation, emulation, FPGA or System level debug to identify RTL logic bugs individually or as a team to root cause and fix
- Drive continuous improvement on existing validation test content/tool/methodology
- Bachelor / Master degree in Electrical & Electronic Engineering, Computer Engineering or equivalent.
- Knowledge of Computer System Architecture .
- Knowledge/experience in digital logic design & design verification e.g. System Verilog, RTL simulation.
- Experience in x86/ARM/RISC-V CPU architecture.
- Proficient in C/C++ , assembly language & scripting language e.g. Perl, Python.
- Strong problem solving, analytical and debug skills.
- Minimum 7 years of relevant working experience for senior positions.
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CPU System Validation Engineer - Penang, Bayan, Malaysia - StarFive Technology Co., Ltd.
2 days ago
Description
Who are we
StarFive is a leading provider of RISCV processors, platforms and solutions. StarFive products are widely used in smart home appliances, smart monitoring, industrial robots, traffic management, intelligent logistics, wearable devices, solid state storage, network communications and edge computing, etc.
We are intensively designing next generation high performance RISC-V CPU and RISC-V-based SoC chips. Talents who are passionate in research and development for future chips are welcomed to join us. Being part of this vibrant team, you can produce world class successful commercial chips supported by efficient software stacks.
Job Highlights
· Working with talented colleagues from around the worlds
· Exciting future with breakthrough technologies
· Great career growth opportunity in a leading RISC-V technology
Job Description:
Requirements: