Jobs

    Senior Engineer - Malaysia - Persolkelly

    Persolkelly
    Persolkelly Malaysia

    3 days ago

    PERSOLKELLY background
    Full time
    Description

    Salary : up to RM10,000

    Job Descriptions:

    • Part of company Back-end Advanced Package Development Team.
    • Responsible towards package design, Signal and Power Integrity simulation, design verification for various company products (Microcontroller, Memory, Power Devices, ASIC, RF, Sensor, etc).
    • Perform/Lead Package and PCB electrical model extraction (RLC, PDN), voltage and timing simulation for signal and power integrity analysis using industry standard Engineering Tools.
    • Develop/Lead design guidelines for High Speed interface (LPDDR, PCIE, MIPI, USB, FPD Link, etc).
    • Involve in NPI of Semiconductor Packages design feasibility and turnkey with signal integrity focus.
    • Participate/Lead simulation and measurement correlation activities, methodology development, continuous accuracy improvement.
    • Work/Lead as a team across functionals with signal integrity centric for customer design adoption support activities.
    • PhD/Master/Bachelor Degree in Electrical, Electronics, Mechatronics, Optoelectronics, Power, Computer, Telecommunication, System, Software, Physic, Material, Mathematics, or relevant.
    • Minimum 5 yearssemiconductor package development experience in design and/or simulation.
    • Good knowledge in Transmission Line and Electromagnetic theory, D0C/AC signalling concept in time and frequency domain analysis.
    • Extensive usage of Scattering Parameters for high speed signals and power delivery network design concept and implementation is a plus.
    • Hands on capability using Design and/or Simulation Tools (Cadence, ANSYS, Mentor, AutoCAD, ADS, Spice, or any relevant).
    • Added advantage with experience working on IBIS model, Package/PCB level model extraction, full system voltage and timing simulation, lab measurements.
    • Good analytical skills on signal integrity analysis (Eye Diagram, Jitter, power noise, signal crosstalk, ringing, lossy attenuation, overshoot/undershoot, etc).
    • Knowledge in high speed interface signal integrity design guidelines (LPDDR, PCIE, MIPI, USB, FPD Link, etc).
    • Encourage extensive lab experience and inspire to venture into simulation hands-on or vice versa.
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